PCB Stackup Calculator: Layer Count, Material & Impedance Planning

Planning a PCB stackup before routing saves time and prevents costly re-spins. This guide provides reference stackup configurations, impedance planning data, and thickness estimation tools for 4 to 24+ layer designs.

For a deeper discussion of stackup design principles, see our multilayer PCB stackup design guide.

Quick Reference: Standard Stackup Configurations

4-Layer Stackup (1.0-1.6mm)

L1 — Signal/Component (1oz)
    ─── prepreg: 2×1080 (7.8 mil) ───
L2 — Ground (1oz)
    ─── core: 30-40 mil ───
L3 — Power (1oz)
    ─── prepreg: 2×1080 (7.8 mil) ───
L4 — Signal/Component (1oz)

Total thickness: ~1.57mm (62 mil) with 40 mil core

Impedance reference:

6-Layer Stackup (1.6mm)

L1 — Signal (1oz)
    ─── prepreg: 1×7628 (7.0 mil) ───
L2 — Ground (1oz)
    ─── core: 8 mil ───
L3 — Signal (0.5oz)
    ─── prepreg: 1×2116 (4.5 mil) ───
L4 — Power (1oz)
    ─── core: 8 mil ───
L5 — Ground (1oz)
    ─── prepreg: 1×7628 (7.0 mil) ───
L6 — Signal (1oz)

Total thickness: ~1.60mm (63 mil)

Impedance reference:

8-Layer Stackup (1.6mm)

L1 — Signal (1oz)
    ─── prepreg: 1×2116 (4.5 mil) ───
L2 — Ground (1oz)
    ─── core: 6 mil ───
L3 — Signal (0.5oz)
    ─── prepreg: 1×1080 (3.9 mil) ───
L4 — Power (1oz)
    ─── prepreg: 1×1080 (3.9 mil) ───
L5 — Ground (1oz)
    ─── core: 6 mil ───
L6 — Signal (0.5oz)
    ─── prepreg: 1×2116 (4.5 mil) ───
L7 — Ground (1oz)
    ─── core: 6 mil ───
L8 — Signal (1oz)

Total thickness: ~1.60mm (63 mil)

Notes: L4-L5 is a tightly coupled power-ground pair (3.9 mil) for distributed decoupling. Every signal layer (L1, L3, L6, L8) has an adjacent ground or power reference.

10-Layer Stackup (2.0mm)

L1  — Signal (1oz)
     ─── prepreg: 1×2116 (4.5 mil) ───
L2  — Ground (1oz)
     ─── core: 6 mil ───
L3  — Signal (0.5oz)
     ─── prepreg: 1×1080 (3.9 mil) ───
L4  — Power VCC (1oz)
     ─── prepreg: 1×1080 (3.9 mil) ───
L5  — Ground (1oz)
     ─── core: 4 mil ───
L6  — Power 3.3V (1oz)
     ─── prepreg: 1×1080 (3.9 mil) ───
L7  — Ground (1oz)
     ─── prepreg: 1×1080 (3.9 mil) ───
L8  — Signal (0.5oz)
     ─── core: 6 mil ───
L9  — Ground (1oz)
     ─── prepreg: 1×2116 (4.5 mil) ───
L10 — Signal (1oz)

Total thickness: ~2.0mm (79 mil)

12-Layer Stackup (2.0mm)

L1  — Signal (1oz)
     ─── prepreg: 1×2116 (4.5 mil) ───
L2  — Ground (1oz)
     ─── core: 4 mil ───
L3  — Signal (0.5oz)
     ─── prepreg: 1×1080 (3.5 mil) ───
L4  — Ground (1oz)
     ─── prepreg: 1×1080 (3.0 mil) ───
L5  — Power VCC (1oz)
     ─── prepreg: 1×1080 (3.0 mil) ───
L6  — Signal (0.5oz)
     ─── core: 4 mil ───
L7  — Signal (0.5oz)
     ─── prepreg: 1×1080 (3.0 mil) ───
L8  — Power 3.3V (1oz)
     ─── prepreg: 1×1080 (3.0 mil) ───
L9  — Ground (1oz)
     ─── prepreg: 1×1080 (3.5 mil) ───
L10 — Signal (0.5oz)
     ─── core: 4 mil ───
L11 — Ground (1oz)
     ─── prepreg: 1×2116 (4.5 mil) ───
L12 — Signal (1oz)

Total thickness: ~2.0mm (79 mil)

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Thickness Estimation Quick Reference

Copper Layer Thickness

Common Prepreg Options

Note: Dk varies with resin content. High-resin prepregs (106, 1080) have lower Dk; low-resin prepregs (7628) have higher Dk due to glass content. This affects impedance calculations.

Typical Total Board Thickness

Impedance Quick Reference

Approximate trace widths for common impedance targets on FR4 (Dk ≈ 4.2, 1oz copper). These are estimates — use your manufacturer’s field solver for production values.

Single-Ended Microstrip (Outer Layer)

Single-Ended Stripline (Inner Layer)

Differential Microstrip (Outer Layer)

Differential Stripline (Inner Layer)

Via Aspect Ratio Calculator

Before finalizing your stackup, verify that your vias are manufacturable:

Aspect ratio = Board thickness ÷ Drill diameter

✅ Standard capability (≤8:1) | ⚠️ Advanced (8-10:1, verify with manufacturer) | ❌ Beyond standard (>10:1, requires specialty process or blind/buried vias)

Material Selection Quick Guide

How to Use This Data

1. Start with layer count — estimate based on net count and complexity
2. Select a reference stackup from the configurations above
3. Check impedance — use the quick reference tables to estimate trace widths
4. Verify aspect ratio — ensure your vias work with the total thickness
5. Send to manufacturer — have them run the field solver and confirm or adjust trace widths

Do not route based on these approximate values. They are starting points for planning. Your manufacturer must simulate impedance on the actual materials they will use, accounting for manufacturing tolerances, etch factor, and solder mask effects.

Free Stackup Planning from Atlas PCB

Atlas PCB provides stackup planning and impedance simulation as part of every order:

• Pre-routing consultation — send us your layer count, impedance targets, and thickness constraints before you route
• Field solver simulation — Polar SI with material-specific Dk data for precise trace width recommendations
• Material mapping — your specified dielectrics matched to available prepreg and core from current stock
• Via feasibility check — aspect ratios verified against factory capability
• Updated stackup document — returned to you with recommended trace widths per layer before routing begins

This service is included at no additional cost. It prevents the costly cycle of routing, sending to fab, discovering impedance does not work, re-stacking, and re-routing.

Frequently Asked Questions

How do I calculate PCB stackup thickness?

Add all copper layer thicknesses (1oz = 35μm per layer) plus all dielectric thicknesses (prepreg and core). For example, an 8-layer board with 1oz copper, two 6mil cores, and five 3.5-4.5mil prepreg layers totals approximately 1.6mm. Actual thickness varies ±5-10% from calculation due to resin flow during lamination — your manufacturer provides the final confirmed thickness after stackup simulation.

What is the standard PCB thickness?

1.6mm (63 mil) is the most common standard, suitable for 4-8 layer boards. Other standards: 0.8mm (thin), 1.0mm (compact), 2.0mm (10-14 layers), 2.4mm (14-20 layers). Board thickness directly affects via aspect ratio — thicker boards need larger drills or blind/buried vias to maintain reliable plating.

How do I choose dielectric thickness for impedance control?

Target trace widths that your design can accommodate, then select dielectric thickness to produce the target impedance at that trace width. For 50Ω microstrip on FR4: 3.5 mil dielectric gives ~5.3 mil traces (tight routing), 4.5 mil gives ~7.0 mil traces (comfortable routing). Start with the quick reference tables in this guide, then have your manufacturer confirm with a field solver before routing.

Summary

• Use reference stackups as starting points — always verify with your manufacturer’s field solver
• Standard 1.6mm thickness fits 4-8 layers; thicker boards for higher layer counts
• Every signal layer needs an adjacent reference plane
• Check via aspect ratio against board thickness before committing to a drill size
• Approximate impedance values are for planning only — production requires field solver simulation

Need help planning your stackup? Upload your Gerbers for a free engineering review with stackup simulation, or send us your requirements before routing and we will recommend an optimal configuration.

Related guides: Multilayer PCB Stackup Design Guide | PCB Impedance Control | PCB Material Selection Guide

Further Reading

• Rogers 4003C Material Properties: Dk, Df, and Design Considerations

• Taconic TLY-5 PCB: Properties, Applications, and Manufacturing Tips

• High-Multilayer FR4 vs Standard FR4: When to Upgrade Material Grade

• PCB Manufacturer with Engineering Review: Why Human DFM Audit Matters

• PCB Solder Mask: Types, Colors, and Functions Explained

• HDI PCB Design Guide: Stackup Rules, Via Structures & DFM Checklist

• PCB DFM Checklist: 50 Points to Review Before Sending Gerbers