HDI Boards

High Density Interconnect PCBs for Next-Gen Electronics

1-3 stage HDI with laser-drilled microvias and any-layer technology. Support for 0.4mm BGA pitch. 3-5x routing density improvement over conventional multilayer boards.

Key Advantages

Why Choose HDI PCBs

Dramatic Size Reduction

HDI allows same routing in 40-60% smaller board area through microvias and fine-pitch routing. Reduce layer count from 12 conventional to 8 HDI layers while maintaining identical connectivity.

Higher I/O Density

Break out 0.4mm pitch BGAs that conventional boards cannot route. Support for 0.5mm and 0.4mm BGA pitch with via-in-pad technology. Essential for modern SoC and FPGA packages.

Superior Signal Integrity

Shorter interconnect paths reduce parasitic inductance and capacitance. Critical for DDR4/DDR5 memory interfaces and high-speed SerDes above 10 Gbps where every mil of trace length matters.

Mobile & Wearable Ready

Purpose-built for space-constrained consumer electronics where every mm² counts. The standard PCB technology for smartphones, tablets, and smartwatches worldwide.

Technical Specifications

HDI PCB Manufacturing Capabilities

Core Parameters

Our HDI capabilities span from cost-effective 1-stage designs through advanced any-layer structures where every layer is interconnected via copper-filled stacked microvias. We match your density requirements to the most economical HDI stage.

HDI Stages

1+N+1, 2+N+2, 3+N+3, and any-layer (every layer interconnected). 1-stage is most cost-effective; any-layer for maximum density.

Laser Via Size

0.1mm (4mil) standard laser drill. 0.075mm available for advanced designs. Aspect ratio 0.8:1 maximum.

Min Trace/Space

3/3mil (75μm) production capability. 2.5/2.5mil for advanced HDI. Standard 4/4mil most cost-effective.

Via-in-Pad

Copper-filled and planarized microvias directly under BGA pads. Eliminates dog-bone fanout, saving 30-50% routing space.

Sequential Lamination

Each HDI stage requires a separate lamination cycle. More stages = higher cost but greater density. Plan for 3-5 additional production days per stage.

Advanced Capabilities

Microvia stacking, filling method, and BGA breakout strategy are the three decisions that define your HDI design. We help you choose the right combination for your density requirements and budget.

Stacked vs Staggered Microvias

Stacked microvias (directly aligned) require copper filling. Staggered (offset) microvias are cheaper but use more routing space. Choose based on density and budget.

Microvia Filling

Conductive copper fill (best for stacking), non-conductive resin fill (lower cost), or cap plating over resin plug. Copper fill required for any stacked via structure.

BGA Breakout

0.8mm pitch: dog-bone fanout on 2 layers. 0.5mm pitch: via-in-pad required. 0.4mm pitch: any-layer HDI recommended for clean escape routing.

Buildup Materials

ABF (Ajinomoto Build-up Film) for finest features. Standard prepreg for 1-stage HDI. RCC (Resin Coated Copper) for mid-range applications.

Impedance Control

±5% for single-ended, ±8% for differential. TDR measurement reports provided for controlled impedance designs. Critical for DDR and SerDes interfaces.

Applications

Where HDI PCBs Are Essential

Smartphones & Wearables

Main logic boards, camera modules, sensor fusion boards for flagship devices where board real estate is the primary constraint.

Server & Networking

High-speed switch fabrics, line cards, and compute modules with dense BGA arrays requiring 0.8mm and 0.65mm pitch breakout.

SoC & Module Design

System-on-chip carrier boards, SiP (System-in-Package) modules, and FPGA breakout boards with hundreds of I/O pins.

Tablets & Laptops

Thin mainboards requiring high layer count in minimal thickness. 0.8mm total board thickness with 8+ layers achievable via HDI.

5G Infrastructure

mmWave antenna modules, beamforming arrays, small cell radio units where signal routing density meets RF performance requirements.

Automotive Computing

ADAS processing units, autonomous driving computers, infotainment SoCs with high pin-count processors and DDR4/5 memory interfaces.

Design Guidelines

DFM Best Practices for HDI PCBs

  • BGA Fanout Strategy

    Plan your BGA escape routing first. 0.8mm pitch works with dog-bone on standard boards. Below 0.65mm, plan for via-in-pad. Map out which balls need which layers before routing.

  • Microvia Stacking Rules

    Never stack more than 2 microvias without copper filling. Staggered vias require 150μm minimum offset. For 3+ stage HDI, always use copper-filled stacked vias.

  • Thermal Via Management

    HDI boards trap heat in inner layers. Add thermal via arrays under power components. Minimum 0.3mm via on 1.0mm grid for thermal relief.

  • Layer Count Optimization

    Start with conventional multilayer, then convert to HDI only where BGA density requires it. A partial HDI approach (HDI in BGA area, conventional elsewhere) reduces cost.

FAQ

Common Questions About HDI PCBs

When is HDI necessary vs standard multilayer?

When BGA pitch is 0.65mm or below, or when you need to reduce layer count/board size by 30%+. If your design routes cleanly on a standard 8-layer board, HDI adds cost without benefit. The break-even point is typically when conventional routing requires 12+ layers that HDI can achieve in 8.

How much more does HDI cost than standard multilayer?

1-stage HDI adds 30-50% to board cost. 2-stage adds 80-120%. Any-layer can be 3-5x standard multilayer. The cost savings from fewer layers and smaller boards often offset the per-board premium, especially at volume.

How many HDI stages do I need?

1-stage (1+N+1): sufficient for 0.65-0.8mm BGA pitch. 2-stage (2+N+2): needed for 0.5mm pitch or very dense routing. Any-layer: required for 0.4mm pitch or when every layer must be interconnected.

Can you handle any-layer HDI designs?

Yes. Our advanced HDI factories support up to 20+ layer any-layer designs with copper-filled stacked microvias on every layer. Minimum production quantity applies for any-layer builds.

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