HDI PCB Manufacturing
HDI PCB Manufacturer Up to 7-Step Sequential Build
Stacked microvias. Via-in-pad. 3/3mil trace. The routing density you need for next-gen silicon — from first HDI to any-layer, across 4–30 layers with no MOQ.
HDI Capabilities
From First HDI to Any-Layer
We match your design complexity to the right factory and process — from a single laser-drilled layer to full any-layer interconnect.
1-Step (1+N+1)
One laser-drilled layer per side. Your entry point into HDI: break out 0.65mm BGA, reduce layer count, enable via-in-pad.
2-Step (2+N+2)
Two sequential laminations, staggered or stacked microvias. For dense multi-chip modules.
3-Step (3+N+3)
Three buildup layers per side, stacked copper-filled vias for maximum via density.
4-Step (4+N+4)
Any-layer interconnect — every layer connects through stacked via towers. The densest mobile and compute designs.
5-Step (5+N+5)
Five laminations per side for advanced SiP modules, AI accelerator substrates, and ultra-dense server boards.
6-Step & 7-Step
The highest density we offer — mobile AP substrates, HBM interposers, and designs where every micron counts.
Via Technology
Via Fill & Microvia Technologies
As an HDI PCB manufacturer, we treat the via as the real density driver. Every buildup layer pairs laser-drilled microvias with the right fill and cap strategy — across 4–30 layers and 1–7 step sequential lamination.
Stacked & Staggered Microvias
Stacked microvias form via towers for via-in-pad under fine-pitch BGA; staggered microvias offset each hop to relax aspect ratio and cost. Copper-filled and planarized on every buildup layer.
Capped Vias (Via-in-Pad)
Copper-filled, plated over, and planarized flat so via-in-pad sits directly under BGA balls without solder wicking or voiding — the foundation of dense HDI escape routing.
Blind & Buried Vias
Blind vias reach from an outer to an inner layer; buried vias connect inner layers only. Both free up outer-layer real estate for routing on dense stackups.
Resin Filled Vias
Plug through-holes and larger vias for a flat, cappable surface ready for plating over. We match fill chemistry to your stackup and account for resin Dk/Df on impedance-controlled and RF layers.
HDI Boards We Build
Stacked, staggered, and any-layer — in the wild
Manufacturing Process
Sequential Lamination, Step by Step
Every buildup layer repeats the same laser-drill, plate, and planarize cycle. Here is what happens on our floor — and why each control matters for microvia reliability.
Core Fabrication
Inner layers built by conventional processing — LDI at 10μm registration, develop, etch, strip, then AOI. This is your N in 1+N+1, and it cannot be reworked once laminated.
Prepreg Layup & Vacuum Lamination
1080/2116 prepreg plus 12–18μm copper foil per side, pressed at 180°C / 300 PSI / 60 min under full vacuum. Resin flows, fills copper topography, and cross-links into a solid dielectric.
Laser Drilling Microvias
CO₂ lasers (9.4μm) drill 100μm microvias at 3000–5000 holes/sec; UV Nd:YAG (355nm) handles sub-100μm and copper-defined vias. 75μm top tapering to ~50μm — aspect ratio below 1:1.
Desmear & Hole Cleaning
Three-stage wet desmear (sweller, permanganate, neutralizer) or plasma desmear (CF₄/O₂) for thin dielectrics. Clean via bottoms prevent weak copper bonds that fail under thermal cycling.
Electroless Copper Seed
A continuous 0.3–0.5μm copper seed on all surfaces including via barrels, providing the conductive path for plating. Bath chemistry held in tight windows for adhesion.
Pattern Plating & Via Fill
Electrolytic copper fills vias and builds 18–25μm trace copper. Bottom-up fill plates faster at the via base so stacked vias fill completely (no dimple > 5μm) for the next layer to land on.
Planarization
Belt-sanded or ground coplanar within 3μm. Without it, the next prepreg traps air over via bumps, creating voids. A flat surface is what lets the next microvia stack onto solid copper.
Repeat, Then Finish
Each buildup step repeats the full cycle (+2–3 days each), holding layer-to-layer registration to ±25μm vs ±50μm standard. Outer layers, solder mask, ENIG/OSP finish, and route/score complete the board.
Materials & Stackup
Matched to your Dk/Df and thermal budget
The buildup dielectric drives both the electrical behavior and the reliability of an HDI board, so we match it to your application rather than defaulting to one laminate. Standard commercial builds use FR-4 prepreg in 1080 (2.8mil cured) or 2116 (4.6mil cured) glass styles — proven, cost-effective, and fully compatible with lead-free reflow.
High-speed and RF-adjacent designs move to Panasonic Megtron 6 (R-5775) for low-loss buildup layers (Df 0.004 at 10GHz), while lead-free assembly reliability comes from high-Tg Isola 370HR (180°C Tg). Because resin fill Dk/Df differs from copper, via-fill choice feeds directly back into the stackup model on impedance-controlled and RF layers.
Applications
Where HDI makes the difference
HDI pays for itself when it eliminates layers, shrinks board area, or enables a package that wouldn't route on standard multilayer.
AI Computing
GPU/TPU accelerator cards, HBM interposers, and AI inference modules with 2500+ pin BGAs on 0.4mm pitch.
Servers & Storage
Server motherboards, NVMe SSD controllers, and high-speed memory modules demanding 12+ layer HDI with via-in-pad.
High-Performance Computing
HPC nodes, FPGA substrates, and edge-computing platforms with 0.4mm BGA at 2000+ pins.
Automotive ADAS
Sensor-fusion processors, camera modules, and lidar control boards in compact housings.
Telecom & 5G
Base-station beamforming boards and RF-adjacent HDI where density meets signal integrity.
Medical & Implants
Miniaturized electronics for hearing aids, neural stimulators, and diagnostic capsules.
The Difference
Why HDI at AtlasPCB
The challenge with HDI isn't whether it can be made — it's whether the microvias survive thermal cycling. Our factory qualification is built around that.
Dedicated HDI Factories
Your board goes to a shop that does HDI every day — not a multilayer house with a laser drill collecting dust.
Stacked Via Expertise
Copper-filled stacked microvias with planarization. Via-in-pad directly under BGA balls without voiding risk.
Stackup Engineering
We verify via-structure feasibility, aspect ratios, and capture-pad sizes before production. No surprises.
Microvia Reliability
Process controls for fill quality and barrel-crack prevention, with IST thermal-cycling testing available.
FAQ
HDI Questions
Staggered: each via offsets from the one below — cheaper, uses more area. Stacked: vias aligned vertically, copper-filled — required for via-in-pad under BGA. Choose stacked when density demands it.
If your BGA pitch is ≤0.65mm, if you need via-in-pad, or if standard routing requires 12+ layers that HDI could do in 8. Upload your design — we will tell you if HDI is necessary or overkill.
1-step: 8 days prototype. 2-step: 10-11 days. 3-step: 13-14 days. 4-step: 16-17 days. 5-step: 19-20 days. 6-step: 22-23 days. 7-step: 25-26 days.
75μm laser-drilled is our standard production minimum for microvias. 100μm is typical for standard HDI where reliability margin is prioritized over density. For advanced substrate-like builds (SiP interposers, HBM fan-out) we go to 50μm with UV laser and tighter process windows, subject to DFM review of aspect ratios and pad capture.
Yes, and most HDI designs are hybrid. The core uses mechanical drilling for through-hole vias (power, ground, low-density signals), while buildup layers use laser drilling for microvias (BGA escape, high-density routing). This is the most cost-effective approach — HDI density only where you need it.
Standard: FR-4 prepreg in 1080 (2.8mil cured) or 2116 (4.6mil cured) — proven, cost-effective, lead-free-reflow compatible. High-speed: Panasonic Megtron 6 R-5775 (Df 0.004 at 10GHz). High-Tg: Isola 370HR (180°C Tg). Matched to your Dk/Df and thermal profile.
Need HDI?
Upload your design. We'll confirm if HDI is the right approach and which step count you actually need.
Resources
HDI Engineering Guides
Technical deep-dives on HDI design, cost optimization, and manufacturing.
HDI PCB vs Standard Through-Hole: Design Tradeoffs, Cost, and When to Upgrade
Decision framework for choosing between HDI and conventional multilayer construction.
Advanced HDI Stackup Design: Sequential Lamination and ELIC
Deep dive into 1+N+1 through 4+N+4 buildup structures and any-layer interconnect.
Via-in-Pad Design: Filled, Capped, and Plated Over
Complete guide to VIPPO specification for BGA escape routing in HDI boards.
HDI PCB Cost Breakdown and Pricing Guide
Understand what drives HDI pricing and how to optimize your design for cost.
BGA Fanout Routing: Dog-Bone vs Via-in-Pad Breakout
Practical routing strategies for fine-pitch BGA packages on HDI stackups.
Microvia Reliability: Stacked vs Staggered Configurations
IPC-6012 requirements and thermal cycling data for HDI via structures.