Apple's iPhone 18 Expected to Push Any-Layer HDI Adoption: Supply Chain Prepares for Record Demand

Apple’s iPhone 18 Expected to Push Any-Layer HDI Adoption: Supply Chain Prepares for Record Demand

Every September, Apple’s iPhone launch triggers the largest single demand event in the global PCB industry. The iPhone’s mainboard — a masterpiece of miniaturized interconnect technology — represents the most demanding high-volume PCB product manufactured anywhere in the world. When Apple changes its PCB specifications, the ripple effects travel through the entire supply chain, from raw material suppliers to equipment manufacturers.

For the iPhone 18, expected to launch in September 2026, supply chain intelligence gathered from equipment orders, capacity announcements, and component qualification reports points to a significant specification upgrade: a move to a 12-layer any-layer HDI mainboard, up from the 10-layer design used in the iPhone 17 series and continuing the relentless complexity escalation that has characterized iPhone PCB design for the past decade.

This article examines what’s driving the change, the technical challenges involved, the supply chain implications, and what this means for the broader PCB industry beyond smartphones.

The Evolution of iPhone Mainboard Technology

Understanding the iPhone 18’s expected PCB specification requires context on how Apple’s mainboard technology has evolved:

The shift from 10 to 12 layers is the first layer count increase since the iPhone X introduced the current any-layer HDI platform in 2017. This is not a trivial change — it requires new stackup designs, updated process recipes, additional laser drilling passes, and more lamination cycles.

What’s Driving 12 Layers

Three converging requirements are pushing the iPhone 18 mainboard to 12 layers:

1. A20 Bionic: More I/Os, Finer Pitch

Apple’s A20 Bionic is expected to be manufactured on TSMC’s N2 (2nm) process, delivering approximately 50% more transistors than the A19’s 3nm design. More transistors mean more on-die functionality, which translates to more package I/Os:

• Estimated A20 package I/O count: 2,200+ (up from ~1,800 on A19)
• Package technology: Fan-out wafer-level packaging (FO-WLP) or advanced substrate
• BGA pitch at board level: estimated <0.35mm (down from ~0.40mm on A19)

Escaping from a <0.35mm pitch BGA with 2,200+ balls requires more routing layers than the current 10-layer design can provide. The additional two layers give designers the routing channels needed to fan out all signals while maintaining impedance control and power delivery integrity. For a detailed understanding of these escape routing challenges, see our BGA escape routing guide.

2. Integrated 5G Modem

Perhaps the most significant change in the iPhone 18 is the expected switch from Qualcomm’s X75 modem to an Apple-designed 5G modem. Apple has been developing its own modem since acquiring Intel’s modem division in 2019, and the iPhone 18 is widely expected to be the first model to use it.

The transition from a discrete modem to an integrated one affects the PCB in several ways:

• RF routing complexity increases. While integrating the modem eliminates one BGA package from the board, it adds RF routing complexity because the modem’s RF front-end components must now connect to the main SoC through board-level traces rather than a package-level interface
• Additional frequency band support. The Apple modem is expected to support both sub-6 GHz and mmWave 5G across multiple global bands, requiring precise impedance-controlled routing for each band
• Power delivery for RF circuits. RF amplifiers and filters require clean, low-noise power delivery — adding power plane partitioning complexity to the stackup
• Antenna feed routing. Multiple antenna feeds must be routed from the modem to antenna modules at the edges of the phone, requiring controlled-impedance transmission lines across the full board length

3. Expanded On-Device AI Processing

Apple’s strategy for AI is centered on on-device processing rather than cloud-based inference. The iPhone 18’s Neural Engine is expected to be significantly expanded, with implications for PCB design:

• Higher power consumption for the Neural Engine during inference (estimated 3–5W peak, up from 2–3W on A19)
• Additional memory bandwidth requiring more DDR5/LPDDR5X signal routing
• Thermal management becoming more critical as sustained AI workloads generate more heat than typical smartphone usage patterns

These combined requirements push the design beyond what 10 layers can accommodate while maintaining Apple’s strict standards for signal integrity, power delivery, and thermal performance.

Any-Layer HDI: The Technology Behind the iPhone Mainboard

For engineers not deeply familiar with any-layer HDI construction, understanding the technology is crucial to appreciating both the manufacturing challenge and the design benefits.

How Any-Layer HDI Works

Traditional HDI PCBs use a core + build-up structure: a conventional multilayer core (made with mechanical through-hole drilling) with one or two laser-drilled build-up layers added to each side. This structure — denoted as 1+N+1 or 2+N+2 — limits microvia connections to the outermost layers.

Any-layer HDI eliminates the conventional core entirely. The board is built up from ultra-thin cores (25–50μm) with laser-drilled microvias connecting every adjacent layer pair. This means:

• Every layer can connect to every adjacent layer through microvias
• Via-in-pad is possible on every layer — see our via-in-pad design guide for design rules
• No mechanical through-holes — the entire interconnect structure uses laser-drilled vias
• Stacked microvias can traverse multiple layers (e.g., a via from L1 to L4 through three stacked microvias)

The result is dramatically higher routing density compared to conventional HDI, as explained in our HDI PCB design guide.

The 12-Layer Stackup Challenge

A 12-layer any-layer HDI stackup for the iPhone 18 would likely look something like:

L1  (signal/component)     ─┐
    microvia L1-L2          │ Build-up 1
L2  (signal/ground)         ─┤
    microvia L2-L3          │
L3  (signal)                ─┤
    microvia L3-L4          │ Build-up 2
L4  (power/ground)          ─┤
    microvia L4-L5          │
L5  (signal)                ─┤
    microvia L5-L6          │ Core
L6  (ground/power)          ─┤
L7  (power/ground)          ─┤
    microvia L7-L8          │ Core
L8  (signal)                ─┤
    microvia L8-L9          │
L9  (power/ground)          ─┤
    microvia L9-L10         │ Build-up 2
L10 (signal)                ─┤
    microvia L10-L11        │
L11 (signal/ground)         ─┤
    microvia L11-L12        │ Build-up 1
L12 (signal/component)     ─┘

Total board thickness target: <0.80mm (iPhone 17’s 10-layer board is approximately 0.72mm). For advanced stackup design strategies, see our HDI stackup design guide.

Key manufacturing challenges for this stackup:

• 11 laser drilling passes (one per via layer pair) compared to 9 for the 10-layer design
• 6 lamination cycles (compared to 5 for 10-layer) — each adding registration error and thickness variation
• Ultra-thin cores of 25–40μm that are extremely fragile and difficult to handle
• Stacked microvia reliability — vias stacked 3–4 deep must maintain conductivity and structural integrity through thermal cycling

Microvia Technology Requirements

The 12-layer board pushes microvia technology to its limits:

• Via diameter: 50–65μm (drilled), 40–50μm (finished after plating)
• Via depth: 25–40μm (single via connecting adjacent layers)
• Capture pad diameter: 80–100μm
• Stacking depth: Up to 4 stacked vias (L1 to L5)
• Fill requirement: Copper-filled (electrolytic copper plating) for all stacked vias
• Laser drilling technology: CO₂ + UV combination drilling, with UV excimer for the finest features

Our guide on laser drilling and microvia technology covers these processes in detail.

Supply Chain: Capacity, Investment, and Concentration

The Big Three Manufacturers

Apple’s any-layer HDI supply chain is concentrated among three primary manufacturers:

Unimicron (Taiwan)

• Largest any-layer HDI producer globally
• Estimated 40–45% of iPhone mainboard production
• Invested approximately $1.2 billion in new any-layer capacity (2025–2026)
• New facilities in Taoyuan and Yangmei specifically for 12-layer capability

Zhen Ding Technology (ZDT, Taiwan/China)

• Second-largest iPhone mainboard supplier
• Estimated 30–35% share
• $900 million capacity expansion across Qinhuangdao and Huangshi facilities
• Focus on yield improvement for 12-layer stacked microvia processes

DSBJ — Dongshan Precision (China)

• Rapidly growing share in iPhone supply chain
• Estimated 15–20% and growing
• $700 million investment in Shenzhen and Yancheng any-layer HDI lines
• Aggressive pricing strategy gaining market share

The combined $2.8 billion in capacity investment reflects the scale of demand Apple represents. At peak production (August–November), iPhone mainboard production can exceed 80 million units per month, consuming the vast majority of global any-layer HDI capacity.

Supply Chain Constraints

The concentration of any-layer HDI capacity in iPhone production creates well-documented supply constraints:

• Lead time extension: During iPhone ramp season (July–October), non-Apple any-layer HDI orders see lead times extend by 2–4 weeks
• Material allocation: Ultra-thin copper foil (2–3μm), ABF-equivalent build-up films, and high-resolution dry film photoresist all face allocation during peak demand
• Equipment bottleneck: High-precision CO₂/UV laser drilling systems (from Mitsubishi Electric, ESI/MKS, and LPKF) have 9–12 month lead times, constraining new capacity additions
• Yield challenges: Moving from 10 to 12 layers reduces initial yield by an estimated 5–10 percentage points, requiring process maturation during the first 2–3 months of production

Broader Industry Impact: Beyond Smartphones

The most important long-term effect of Apple’s push to 12-layer any-layer HDI isn’t about smartphones at all — it’s about what happens when this technology becomes available to other applications.

Technology Transfer to Other Markets

Every advance in smartphone PCB technology eventually migrates to other applications:

• Automotive ADAS: Compact radar and camera processing modules are beginning to adopt 6–8 layer any-layer HDI where conventional HDI was previously used
• AI accelerator modules: Server-class boards are evaluating any-layer HDI for the high-density region surrounding GPU packages
• Medical devices: Implantable and wearable medical electronics benefit from the miniaturization enabled by any-layer construction
• AR/VR headsets: Next-generation augmented reality glasses require PCB densities that only any-layer HDI can provide

Equipment and Process Democratization

As Apple drives fabricators to invest in 12-layer any-layer capacity, the equipment, process knowledge, and trained workforce become available for non-smartphone applications:

• Second-tier fabricators acquire the previous generation’s equipment as Apple suppliers upgrade, bringing any-layer capability to a wider base
• Process knowledge developed for smartphone production transfers to automotive and industrial applications with different reliability requirements but similar density needs
• Material suppliers scale production of ultra-thin copper foils, build-up films, and specialty photoresists, reducing costs through volume

What This Means for PCB Designers

If you’re not designing smartphone mainboards, the iPhone 18’s 12-layer any-layer HDI might seem irrelevant. It’s not. The technology cascade means:

1. Any-layer HDI is becoming more accessible. As capacity expands and yields improve, pricing is decreasing. What was exclusively Apple-tier technology three years ago is now available from HDI PCB manufacturers for medium-volume applications at reasonable cost points.

2. Design rules are becoming more standardized. IPC is developing acceptance criteria for any-layer HDI based on smartphone manufacturing experience, making it easier for non-smartphone designers to specify and qualify these boards.

3. Via-in-pad is becoming the default. As any-layer HDI normalizes via-in-pad on every layer, the design community’s experience with via-in-pad design is growing rapidly.

4. Ultra-fine features are becoming production-ready. 20/20μm line/space, which would have been considered experimental five years ago, is becoming a production specification that fabricators can reliably deliver.

Timeline and Market Expectations

• Q2 2026: Engineering validation builds for iPhone 18 mainboard (current stage)
• Q3 2026 (July): Mass production ramp begins at Unimicron, ZDT, and DSBJ
• September 2026: iPhone 18 launch event and initial consumer availability
• Q4 2026: Peak production at 80+ million units/month
• 2027: 12-layer any-layer HDI begins appearing in non-smartphone applications

What This Means for Your Next Project

Whether you’re designing next-generation smartphone mainboards, compact wearable electronics, or high-density computing modules, Atlas PCB’s engineering team stays ahead of industry developments to deliver optimized solutions. Contact us to discuss how these developments affect your PCB requirements.

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