· AtlasPCB Engineering · Engineering  · 3 min read

How to Specify Impedance on Your PCB: Stackup Notes & Fab Drawing Tips

Practical guide to specifying controlled impedance on PCB fabrication drawings. Covers impedance table format, stackup documentation, tolerance specifications, TDR coupon design, and communication best practices with your PCB manufacturer.

How to Specify Impedance on Your PCB: Stackup Notes & Fab Drawing Tips

Getting controlled impedance right starts long before manufacturing—it starts with how you communicate your requirements to the fabricator. A well-documented impedance specification eliminates guesswork, reduces the need for costly re-spins, and ensures your production boards match your simulation results.

This guide covers the practical details of specifying impedance on your PCB: what to include in your fabrication drawing, how to format impedance tables, stackup documentation best practices, and the communication workflow with your manufacturer.

What to Include in Your Impedance Specification

The Impedance Control Table

Every impedance-controlled design should include a table in the fabrication notes with these columns:

ColumnExamplePurpose
Net ClassUSB3_DPIdentifies the signal group
Impedance TypeDifferentialSE, differential, or coplanar
Target Impedance90Ω ±5%Value and tolerance
Signal LayerL3Which copper layer
Reference LayerL2 (GND)Adjacent reference plane
Trace Width4.0 mil (target)Designer’s starting value
Trace Spacing5.0 milFor differential pairs
Copper Weight0.5 ozSignal layer copper

Example impedance table:

Net ClassTypeTargetToleranceSignal LayerReferenceWidthSpace
CLK_100Single-ended50Ω±5%L1L2 (GND)4.5 mil
USB3_DP/DNDifferential90Ω±5%L3L2 (GND)4.0 mil5.0 mil
PCIE_TXDifferential85Ω±5%L5L4 (GND)4.0 mil6.0 mil
DDR4_DQSingle-ended40Ω±10%L1L2 (GND)5.0 mil

Stackup Documentation

Include a complete stackup cross-section showing:

  1. Layer numbers and functions (signal, ground, power)
  2. Copper weight for each layer
  3. Dielectric material and thickness between each layer pair
  4. Total board thickness with tolerance
  5. Material specification (e.g., “Isola 370HR or equivalent, Dk ≤ 4.2 @ 1 GHz”)

Critical note: Specify “or equivalent” with a Dk range rather than a single material. This gives the fabricator flexibility to use available stock while maintaining your impedance targets. The fabricator will adjust trace widths based on their actual material’s Dk.

Tolerance Specification

ToleranceApplicationCost ImpactVerification
±10%General digital, IPC defaultBaselineProcess control only
±7%Mid-range, DDR3/4+5%Coupon recommended
±5%High-speed (PCIe, USB3, 10G+)+10-15%Coupon mandatory
±3%RF/microwave+25-40%Every board TDR tested

For detailed impedance control methodology, see our PCB impedance control guide.

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TDR Test Coupon Design

Coupon Types

CouponMeasuresMinimum Length
Microstrip SESingle-ended outer layer impedance6 inches
Microstrip differentialDifferential outer layer impedance6 inches
Stripline SESingle-ended inner layer impedance6 inches
Stripline differentialDifferential inner layer impedance6 inches

Coupon Placement

  • Place coupons on the panel border (breakaway area), not on the board itself
  • Include all impedance variations present in your design
  • Ensure coupons use the same dielectric spacing as the corresponding board layers
  • Add launch pads compatible with the fabricator’s TDR probe (typically SMA or microprobe)

Communication Best Practices

What to Send Your Fabricator

  1. Gerber files (RS-274X or Gerber X2 with embedded attributes)
  2. Drill files (Excellon format with plated/non-plated separation)
  3. Fabrication drawing (PDF) with impedance table, stackup, and manufacturing notes
  4. Stackup file (if available from your EDA tool—Altium .stackup, Allegro .brd)
  5. README or specification document highlighting critical requirements

Common Impedance Specification Mistakes

  1. Specifying trace width without impedance target: Trace width is a means, impedance is the requirement. Let the fabricator optimize width for their materials.
  2. Forgetting to specify the reference layer: Impedance depends on dielectric thickness to the reference plane—ambiguity here causes errors.
  3. Using simulation Dk values as specifications: Your field solver uses ideal Dk; the fabricator’s actual material varies. Specify impedance, not Dk.
  4. Not accounting for copper roughness: At frequencies above 3 GHz, copper roughness significantly affects impedance. Specify low-profile copper if needed.

For stackup documentation best practices, see our PCB stackup design guide and controlled impedance PCB guide.

Ready to get your impedance-controlled board manufactured? Upload your Gerbers with your impedance specifications for a free engineering review.

Further Reading

  • impedance-control
  • pcb-design
  • fab-drawing
  • manufacturing
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