Indium Corporation to Present Solder TIM Research for AI Thermal Challenges at IEEE ECTC 2026

As AI accelerators push thermal design power (TDP) beyond 700 watts per chip, the thermal interface between the die and the heat spreader has become a critical bottleneck. At the upcoming IEEE Electronic Components and Technology Conference (ECTC), May 26–29 in Orlando, Florida, Indium Corporation will present research demonstrating how solder-based thermal interface materials (sTIMs) with 86 W/mK thermal conductivity can address these next-generation cooling challenges.

The Research: Fluxless Vacuum Formic Acid Reflow

Applications Development Engineer Kyle Aserian will present a paper titled “Fluxless Vacuum Formic Acid Reflow of Indium Solder Thermal Interface Materials in Large Area BGA Packages” at ECTC on May 27.

The key findings include:

Performance advantages of indium-based sTIMs:

• 86 W/mK thermal conductivity — far exceeding the 3–8 W/mK typical of polymer thermal interface materials (TIMs)
• Metallurgical bond formation between the solder TIM and the mating surfaces, eliminating the contact resistance that limits polymer TIMs
• Superior thermal cycling reliability — the metallic bond maintains consistent thermal resistance through repeated temperature excursions

Process innovation:

• Fluxless vacuum formic acid reflow eliminates the need for traditional flux chemistry, which can leave residue and require post-reflow cleaning
• Minimized voiding for multi-reflow applications like BGA assembly, where the sTIM must survive multiple reflow cycles without degradation
• Research demonstrates pathways to low voiding rates that ensure uniform heat dissipation across large-area processor packages

Why Solder TIMs Matter for AI Hardware

The thermal management challenge in modern AI hardware is multi-dimensional:

Power density is escalating rapidly. NVIDIA’s GB200 Grace Blackwell platform pushes 1,200W per module. AMD’s MI350X targets similar thermal envelopes. At these power levels, even small improvements in thermal interface performance translate to significant system-level benefits — lower junction temperatures, higher clock speeds, and longer component lifetimes.

Polymer TIMs are reaching their limits. Traditional thermal greases and phase-change materials top out at 5–8 W/mK, creating a thermal bottleneck at the die-to-lid interface. For a 600 mm² die dissipating 700W, a polymer TIM at 5 W/mK creates a 2–3°C temperature rise across the interface alone. An indium sTIM at 86 W/mK reduces this to less than 0.2°C.

Multi-chiplet architectures increase complexity. With CoWoS and SoIC packaging integrating multiple chiplets under a single heat spreader, the TIM must cover larger areas while maintaining uniform contact. Solder TIMs, with their ability to form conformal metallurgical bonds, are better suited to these large-area, multi-chip configurations than polymer alternatives.

Implications for PCB and System-Level Design

The shift toward solder TIMs has ripple effects throughout the electronics assembly chain:

Board-level thermal design: Even with improved die-to-lid thermal interfaces, the PCB must still transport heat away from the socket area. This drives demand for [thermal via arrays]/blog/pcb-thermal-via-design/), heavy copper inner layers, and embedded heat sinks — design features that AtlasPCB regularly implements for AI server and [HPC board designs]/blog/ai-hardware-pcb-thermal-management-multilayer-design/).

Assembly process compatibility: If the sTIM is applied using vacuum reflow, the assembly sequence must accommodate this step without disturbing other solder joints. PCB designers should consider the thermal profile impact on nearby components and ensure the [BGA pad design]/blog/bga-pad-design-via-in-pad-solder-voiding-prevention/) is compatible with multi-reflow processing.

Reliability validation: Solder TIMs introduce a metallic interface that experiences different failure modes than polymer TIMs — specifically, thermal fatigue cracking under CTE mismatch between the die and heat spreader. System-level [reliability testing]/blog/pcb-reliability-testing/) must account for this new interface in thermal cycling qualification.

About IEEE ECTC 2026

The 76th Electronic Components and Technology Conference is the premier event for electronics packaging research. ECTC 2026 will be held May 26–29 at the Orange County Convention Center in Orlando, Florida. Attendees can see Aserian’s presentation on May 27 at 11:55 AM EDT and visit Indium Corporation at booth 240.

Source: PCB Directory (May 15, 2026), Indium Corporation

Image: ThisisEngineering via Unsplash

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